• DocumentCode
    2826250
  • Title

    "ITRS test challenges need defect based test: fact or fiction?"

  • Author

    Plusquellic, J.

  • Author_Institution
    University of Maryland, BC
  • fYear
    2004
  • fDate
    25-25 April 2004
  • Firstpage
    112
  • Lastpage
    112
  • Abstract
    An important distinction between traditional "logical fault model" based testing and defect based testing is the potential for the latter to better handle emerging defect types and changing circuit sensitivities in VDSM circuits. ITRS gives specific examples of emerging defects including the potential for more particle-related blocked-etch resistive opens that result from the change from a subtractive aluminum process to damascene Cu. A second example derives from aggressive scaling into the nanometer domain which increases the probability of incomplete etch and the occurrence of resistive vias.
  • Keywords
    Aluminum; Circuit faults; Circuit testing; Etching; Failure analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Current and Defect Based Testing, 2004. DBT 2004. Proceedings. 2004 IEEE International Workshop on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-7803-8950-6
  • Type

    conf

  • DOI
    10.1109/DBT.2004.1408971
  • Filename
    1408971