Hardware implementations for digital filters with low coefficient sensitivity

Hardware structures which take advantage of the low sensitivity properties of cascaded second-order sections based upon complex first-order allpass sections are investigated. A bit serial multiplier module which implements the dual multiplier structure of the complex allpass section is discussed. In addition, a serial/parallel structure is introduced to take advantage of a reduced signed digital number scheme implementation. Comparisons between the hardware implementations of the complex allpass form and the cascaded second-order direct form are given