DocumentCode
2831844
Title
On improving the linearity of DACs using TIAMPs
Author
Chong, Chu Phoon ; Smith, Kenneth C. ; Vranesic, Zvonko G.
Author_Institution
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
fYear
1991
fDate
11-14 Jun 1991
Firstpage
1513
Abstract
Linearity of a D/A converter using TIAMPs is analyzed. Proof of the fact that DNL at the first-major carry is most sensitive to the gain error of the TIAMPs is given. Results of the linearity analysis lead to an optimum D/A converter configuration using non-identical cells. A TIAMP design with low closed-loop-gain error is described. Experimental results show that accuracy of the TIAMP DAC, limited by channel mismatches of the TIAMPs, has been increased to 11 bits
Keywords
coding errors; digital-analogue conversion; linearisation techniques; D/A converter; DAC linearity improvement; TIAMPs; closed-loop-gain error; three input amplifiers; CMOS process; Differential equations; Libraries; Linearity; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1991., IEEE International Sympoisum on
Print_ISBN
0-7803-0050-5
Type
conf
DOI
10.1109/ISCAS.1991.176663
Filename
176663
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