DocumentCode
2833575
Title
Using infrastructure IPs to support SW-based self-test of processor cores
Author
Bernardi, P. ; Rebaudengo, M. ; Reorda, M. Sonza
Author_Institution
Politecnico di Torino, Dipt. di Automatica e Informatica, Torino, Italy
fYear
2004
fDate
9-10 Sept. 2004
Firstpage
22
Lastpage
27
Abstract
SoCs normally include microprocessor/microcontroller cores. Testing them following the software-based self-test approach is attractive, mainly because this allows at speed testing, and does not require internally modifying the core. However, this raises some issues, such as how to upload and launch the test, how to monitor the results, how to embed the adopted solutions into a suitable wrapper to enhance core modularity and test reusability. The paper proposes a possible solution to the above issues exploiting Infrastructure IPs, and reports the results gathered on two case studies.
Keywords
automatic test software; logic testing; microprocessor chips; system-on-chip; infrastructure IP; microcontroller core; microprocessor core; software-based processor self-testing; speed testing; system-on-chip; Automatic testing; Built-in self-test; Hardware; Integrated circuit testing; Logic testing; Microcontrollers; Microprocessors; Monitoring; Performance evaluation; Software testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprocessor Test and Verification (MTV'04), Fifth International Workshop on
ISSN
1550-4093
Print_ISBN
0-7695-2320-X
Type
conf
DOI
10.1109/MTV.2004.25
Filename
1563069
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