DocumentCode
2834357
Title
On experimental research of efficiency of tests construction for combinational circuits by the focused search method
Author
Kulikov, Vasily ; Mokhor, Vladimir
Author_Institution
Inst. of Special Telecommun. & Inf. Security of Nat. Tech., Univ. of Ukraine, Ukraine
fYear
2011
fDate
9-12 Sept. 2011
Firstpage
247
Lastpage
250
Abstract
Consider the possibility reducing the iteration value in building complete validation tests for digital devices. Building a test for a given fault is reduced to searching the terminal node in the signals assignment tree. The reducing is achieved by accumulating and using of information about dead-end conditions to avoid similar situations in the earlier stages. Allows any faults that can be described by logical functions.
Keywords
circuit reliability; combinational circuits; fault diagnosis; logic testing; tree searching; combinational circuits; digital devices; focused search method; logical functions; signal assignment tree; terminal node; Buildings; Circuit faults; Combinational circuits; Complexity theory; Digital circuits; System recovery; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2011 9th East-West
Conference_Location
Sevastopol
Print_ISBN
978-1-4577-1957-8
Type
conf
DOI
10.1109/EWDTS.2011.6116588
Filename
6116588
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