• DocumentCode
    2842551
  • Title

    Development of VCI (Vertical Circuit Interconnection) technology for stacked die package

  • Author

    Chang, Ivan ; Chiang, James ; Liu, Daniel ; Tsai, FL ; Shih, Daniel ; Tung, Edward ; Tsai, Jensen ; Lan, Albert ; Hsiao, CS ; Ku, River ; Lai, YT

  • Author_Institution
    Siliconware Precision Ind. Co., Ltd., Taichung, Taiwan
  • fYear
    2011
  • fDate
    19-21 Oct. 2011
  • Firstpage
    137
  • Lastpage
    139
  • Abstract
    Wire bonding technology has been the mainstream for stacked die packages for over five years. Yet, based on current design rule, the package body size increases with respect to the number of dice stacked in the package. Furthermore, the electrical performance is greatly dependant to the wire length. By applying Vertical Circuit Interconnection technology, VCI, the package footprint can be reduced to offer relatively smaller package size. As such, the electrical performance is enhanced due to shorter signal transmitting length. The concept of VCI technology is to replace wire bond by conductive glue, which vertically connects electric pads from strum to strum inside the die stack. Besides the standard assembly process flow, such as die attach, molding, singulation, three new process stages ̅- parylene coating, laser ablation and conductive glue dispensing, are introduced to replace wire bonding after die attach process. Two test vehicles, tier stack and pyramid stack structure, were discussed in the report. Open / short test and reliability performance were examined post assembly. The packages delivered by VCI technology can be an alternative choice in small package as it offers competitive cost and performance to those by WB technology.
  • Keywords
    circuit reliability; coatings; conductive adhesives; electronics packaging; interconnections; laser ablation; lead bonding; VCI technology; WB technology; conductive glue dispensing; electric pad; laser ablation; package body size; package footprint; parylene coating; pyramid stack structure; shorter signal transmitting length; stacked die package; standard assembly process flow; tier stack; vertical circuit interconnection technology; wire bonding technology; wire length; Coatings; Fingers; Laser ablation; Microassembly; Substrates; Through-silicon vias; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International
  • Conference_Location
    Taipei
  • ISSN
    2150-5934
  • Print_ISBN
    978-1-4577-1387-3
  • Electronic_ISBN
    2150-5934
  • Type

    conf

  • DOI
    10.1109/IMPACT.2011.6117228
  • Filename
    6117228