• DocumentCode
    2842778
  • Title

    Multi-Gb/s I/O link model to hardware correlation

  • Author

    Timpane, Trevor J. ; Fox, Benjamin A. ; Maxson, Mark O. ; Bartley, Gerald K.

  • Author_Institution
    IBM Eng. & Technol. Services, Rochester, MN, USA
  • fYear
    2005
  • fDate
    24-26 Oct. 2005
  • Firstpage
    155
  • Lastpage
    158
  • Abstract
    Presented herein are the time-domain simulation results for a multi-Gb/s I/O channel using three different modeling and simulation approaches. Time-domain simulation results based on a converted S-parameter model, segmented RLGC models, and a VNA extracted end-to-end channel measurement based model.
  • Keywords
    S-parameters; SPICE; circuit simulation; integrated circuit modelling; time-domain analysis; I/O link model; RLGC models; S-parameter model; VNA extracted channel measurement; end-to-end channel measurement; hardware correlation; time-domain simulation; Analytical models; Circuit simulation; Computational modeling; Engines; Hardware; Packaging; Scattering parameters; Time domain analysis; Virtual colonoscopy; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting on
  • Print_ISBN
    0-7803-9220-5
  • Type

    conf

  • DOI
    10.1109/EPEP.2005.1563725
  • Filename
    1563725
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2842778