DocumentCode
2842789
Title
Architecture rationalization: a methodology for architecture verifiability, traceability and completeness
Author
Tang, Antony ; Han, Jun
Author_Institution
Fac. of ICT, Swinburne Univ. of Technol., Melbourne, Vic., Australia
fYear
2005
fDate
4-7 April 2005
Firstpage
135
Lastpage
144
Abstract
Architecture modeling is practiced extensively in the software industry but there is little attention paid to the traceability, verifiability and completeness of architecture designs. Deficiencies in any of these three areas in an architecture model can be costly and risky to projects. We propose the architecture rationalization method (ARM), which is based on architecture rationale, to overcome these issues. ARM makes use of both qualitative and quantitative rationales for selecting architecture designs. Quantitative rationale uses a model based on costs, benefits and risks in the selection process. ARM provides a method to determine when an architecture model is complete in that the level of details represented by the architecture design is sufficient. We apply ARM to a real-life industry case retrospectively to demonstrate how ARM can overcome issues surrounding traceability and verifiability.
Keywords
formal specification; program verification; software architecture; architecture rationalization method; qualitative rationale; quantitative rationale; software architecture modeling; software completeness; software development life cycle; software traceability; software verifiability; Australia; Computer architecture; Computer industry; Electronic mail; Large-scale systems; Process design; Programming; Software design; Software standards; Software systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering of Computer-Based Systems, 2005. ECBS '05. 12th IEEE International Conference and Workshops on the
Print_ISBN
0-7695-2308-0
Type
conf
DOI
10.1109/ECBS.2005.17
Filename
1409911
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