DocumentCode
2844479
Title
Single-Event Transient Analysis in High Speed Circuits
Author
Hosseinabady, Mohammad ; Lotfi-kamran, Pejman ; Mathew, Jimson ; Mohanty, S. ; Pradhan, Dhiraj
Author_Institution
Queen´´s Univ. of Belfast, Belfast, UK
fYear
2011
fDate
19-21 Dec. 2011
Firstpage
112
Lastpage
117
Abstract
The effect of Single-Event Transients (SETs) (at a combinational node of a design) on the system reliability is becoming a big concern for ICs manufactured using advanced technologies. An SET at a node of a combinational part of a circuit may propagate as a transient pulse at the input of a flip-flop and consequently latches in the flip-flop, thus generating a soft-error. When an SET is combined with a transition at a node (i.e., dynamic behavior of that node) along a critical path of the combinational part of a design, a transient delay fault may occur at the input of a circuit flip-flop. Using the Probability Density Function (PDF) of an SET, this paper proposes a statistical method to compute the probability of soft-errors caused by SETs considering dynamic behavior of a circuit.
Keywords
circuit reliability; electrical faults; flip-flops; probability; radiation hardening (electronics); IC manufacturing; SET; circuit flip-flop; high speed circuit; probability density function; single-event transient analysis; soft error; system reliability; transient delay fault; System analysis and design; High Speed Circuits; SEU; Single-Event Transients; Transient Analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2011 International Symposium on
Conference_Location
Kochi, Kerala
Print_ISBN
978-1-4577-1880-9
Type
conf
DOI
10.1109/ISED.2011.73
Filename
6117336
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