DocumentCode
2846398
Title
A 1.2-V CMOS four-quadrant analog multiplier
Author
Blalock, Benjamin J. ; Jackson, Scott A.
Author_Institution
Dept. of Electr. & Comput. Eng., Mississippi State Univ., MS, USA
fYear
1999
fDate
1999
Firstpage
1
Lastpage
4
Abstract
A 1.2 V CMOS four-quadrant analog multiplier is presented. Using both the gate and bulk terminals of the MOSFET to achieve modulation, a simple 4-transistor multiplier core is obtained. Experimental results are given for a 0.5-μm prototype with VTn=0.7 V and VTp=-0.9 V
Keywords
CMOS analogue integrated circuits; MOSFET; analogue multipliers; 0.5 mum; 0.7 V; 0.9 V; 1.2 V; 4-transistor multiplier core; MOSFET; bulk terminals; four-quadrant analog multiplier; gate terminals; Analog computers; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Circuit simulation; Design engineering; Integrated circuit technology; MOSFET circuits; Prototypes; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on
Conference_Location
Tucson, AZ
Print_ISBN
0-7803-5510-5
Type
conf
DOI
10.1109/SSMSD.1999.768580
Filename
768580
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