• DocumentCode
    2849985
  • Title

    Efficient system design using the Statistical Analysis of Architectural Bottlenecks methodology

  • Author

    Arora, Manish ; Feng Wang ; Rychlik, B. ; Tullsen, Dean M.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Univ. of California San Diego, La Jolla, CA, USA
  • fYear
    2012
  • fDate
    16-19 July 2012
  • Firstpage
    217
  • Lastpage
    226
  • Abstract
    CPU processor design involves a large set of increasingly complex design decisions Doing full, accurate simulation of all possible designs is typically not feasible. Prior techniques for sensitivity analysis seek to identify the most critical design parameters, but also struggle to handle the increasing design space well. They can be overly sensitive to the starting fixed point of the design, can still require a large number of simulations, and do not necessarily account for the cost of each design parameter. The Statistical Analysis of Architectural Bottlenecks (SAAB) methodology simultaneously analyzes multiple parameters and requires a small number of experiments. SAAB leverages the Plackett and Burman analysis method, but builds upon the technique in two specific ways. It allows a parameter to take multiple values and replaces the unit-less impact factor with a cost-proportional impact value. This paper applies the SAAB methodology to the design of a mobile processor sub-system. It considers area and power cost models for the design.
  • Keywords
    integrated circuit design; microprocessor chips; mobile computing; sensitivity analysis; statistical analysis; CPU processor design; Plackett-Burman analysis method; SAAB method; Statistical Analysis of Architectural Bottlenecks; area cost model; cost-proportional impact value; design parameter; design space; mobile processor subsystem design; power cost model; sensitivity analysis; unit-less impact factor; Benchmark testing; Browsers; Design methodology; Mobile communication; Multicore processing; Sensitivity analysis; Upper bound; Bottleneck Analysis; Cost Optimized Design; Plackett and Burman;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Embedded Computer Systems (SAMOS), 2012 International Conference on
  • Conference_Location
    Samos
  • Print_ISBN
    978-1-4673-2295-9
  • Electronic_ISBN
    978-1-4673-2296-6
  • Type

    conf

  • DOI
    10.1109/SAMOS.2012.6404177
  • Filename
    6404177