• DocumentCode
    285111
  • Title

    Multitechnology neural network accelerator

  • Author

    Brown, Harold K. ; Hazlett, Thomas L. ; Abdallah, Said

  • Author_Institution
    Dept. of Electr. Eng., Florida Inst. of Technol., Melbourne, FL, USA
  • Volume
    2
  • fYear
    1992
  • fDate
    7-11 Jun 1992
  • Firstpage
    613
  • Abstract
    The authors describe an architecture, suitable for standardization, which has the ability to be scaled well above teraflops in performance. The nature of this architecture is the combined ability to support multiple technologies such that analog and digital computing nodes can function in parallel. It features transparent nearest neighbor connectivity allowing for better than gigabaud communication rates between nodes, and modular software development allowing for system upgrades that are transparent to application writers. An example system which is being proposed for recycling of materials is discussed. It is shown how various nodes are integrated together to address a sensor fusion problem. Sample code segments are provided, illustrating how an application writer would utilize the system. The enclosure technology capable of housing the system is introduced
  • Keywords
    neural nets; parallel architectures; application writer; enclosure technology; multiple technologies; neural network accelerator; transparent nearest neighbor connectivity; Acceleration; Analog computers; Application software; Computer architecture; Concurrent computing; Nearest neighbor searches; Neural networks; Programming; Recycling; Standardization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Networks, 1992. IJCNN., International Joint Conference on
  • Conference_Location
    Baltimore, MD
  • Print_ISBN
    0-7803-0559-0
  • Type

    conf

  • DOI
    10.1109/IJCNN.1992.226920
  • Filename
    226920