• DocumentCode
    2853510
  • Title

    Storage array and sense/refresh circuit for single-transistor memory cells

  • Author

    Stein, K. ; Sihling, A. ; Doering, E.

  • Author_Institution
    Siemens AG, Munich, Germany
  • Volume
    XV
  • fYear
    1972
  • fDate
    16-18 Feb. 1972
  • Firstpage
    56
  • Lastpage
    57
  • Abstract
    The read signals of dynamic single-transistor MOS memory cells decrease with decreasing cell area. This paper will discuss a noise-compensating array and sensitive refresh amplifiers allowing a minimum cell area of 1600 μm2(2.6 mil2).
  • Keywords
    Capacitors; Circuit analysis computing; Electrodes; MOSFETs; Parasitic capacitance; Silicon; Solid state circuits; Transistors; Video recording; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1972 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1972.1155066
  • Filename
    1155066