Parameter extraction of MESFET and HBT equivalent circuit models using improved simulated annealing

The classical simulated annealing (CSA) method is improved and applied to solving the problem of parameter extraction of MESFET and heterostructure bipolar transistor (HBT) equivalent circuit models. For the improved simulated annealing (ISA), Cauchy sampling is utilized as an alternative to Gaussian sampling in CSA, and the cooling scheme of fast simulated annealing (FSA) is modified to further improve the efficiency. In addition, the whole annealing process is traced to overcome the inherent drawback of CSA, i.e. that usually certain intermediate solutions are superior to the final one. A new stopping criterion for the sampling and annealing process is offered. Thus, ISA is less computationally intensive. Two examples of parameter extraction of MESFET and HBT equivalent circuit models are given to demonstrate the higher efficiency of ISA