DocumentCode
2858826
Title
Research on Parallelism of Mass Memory Based FLASH Data Recording and Replay
Author
Zhang Weigong ; Qiu Qinglin ; Rong Jinye ; Zhang Yongxiang
Author_Institution
Coll. of Inf. Eng., Capital Normal Univ., Beijing, China
fYear
2009
fDate
11-13 Dec. 2009
Firstpage
1
Lastpage
3
Abstract
With the characteristics of mass memory and highspeed storing, the NAND FLASH have been widely accepted in the filed of date storage. However, due to the restrictions on use of it, the NAND FLASH can not realize the date storing and reading into operation at the same time, and the bad block may be generated when NAND FLASH under using. In this paper, a plan is proposed to solve the problems. The NAND FLASH and SRAM are used together to realize the data storing and reading working simultaneously, and the bad blocks of NAND FLASH can also be managed.
Keywords
SRAM chips; flash memories; parallel architectures; NAND FLASH memory; data recording; data replay; highspeed storing; mass memory parallelism; static RAM; Buffer storage; Computer buffers; Costs; Data communication; Data engineering; Educational institutions; Power dissipation; Random access memory; Read-write memory; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Intelligence and Software Engineering, 2009. CiSE 2009. International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-4507-3
Electronic_ISBN
978-1-4244-4507-3
Type
conf
DOI
10.1109/CISE.2009.5365890
Filename
5365890
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