DocumentCode
2860781
Title
A 1024-bit ECL RAM with 15-ns access time
Author
Rathbone, R. ; Ernst, Herbert ; Glock, H. ; Schwabe, Ulrich
Author_Institution
Siemens AG, Munich, Germany
Volume
XIX
fYear
1976
fDate
18-20 Feb. 1976
Firstpage
188
Lastpage
189
Abstract
DEVELOPMENT SAMPLES of a 1024-bit bipolar ECI, RAM have shown typical address access time of 15 ns at 400 mW dissipation. This access time is faster than the previously rcported 1K RAM access time of 25 ns´. Results were achieved by a combination of oxide isolation technology with N-epitaxy2 - OXIS - and improved ECL circuit design. Measurements agree well with calculations made using a fast transient analysis program.
Keywords
Capacitance; Carbon capture and storage; Circuit synthesis; Isolation technology; Pulse amplifiers; Springs; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1976.1155527
Filename
1155527
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