A model for imaging system-on-chip manufacturing costs

Author

Wells, Cade C. ; Duncan, Ed ; Renshaw, David

Author_Institution

Inst. for Syst. Level Integration, UK

fYear

2004

fDate

16-18 Nov. 2004

Firstpage

53

Lastpage

56

Abstract

This work describes some of the issues faced when integrating a CMOS image sensor into a system-on-chip (SoC). A simple method is proposed for estimating the manufacturing costs of imaging SoCs at several silicon processes using readily available information sources. A low-cost imaging SoC with integral DSP is presented and its manufacturing cost calculated. The results indicated that for the example given, processes of 0.18 μm or smaller only start to become more economical than older processes at $2.80 per unit for 500k units.

Keywords

CMOS image sensors; costing; digital signal processing chips; integrated circuit economics; system-on-chip; 0.18 micron; CMOS image sensor integration; economical processes; imaging SoC; imaging system-on-chip manufacturing cost model; information sources; integral DSP; manufacturing cost; silicon processes; CMOS image sensors; Consumer electronics; Costs; Lenses; Optical imaging; Semiconductor device modeling; Sensor arrays; Silicon; System-on-a-chip; Virtual manufacturing;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip, 2004. Proceedings. 2004 International Symposium on

Print_ISBN

0-7803-8558-6

Type

conf

DOI

10.1109/ISSOC.2004.1411145

Filename

1411145