DocumentCode
2866929
Title
Submicron channel MOS-IC technology
Author
Yamaguchi, Toru ; Lust, M. ; Ragsdare, S. ; Sato, Seiki
Author_Institution
Tektronix, Inc., Beaverton, OR, USA
Volume
XXII
fYear
1979
fDate
14-16 Feb. 1979
Firstpage
82
Lastpage
83
Abstract
The development of a submicron channel length MOS IC with a channel length of 0.3 to 0.9μm will be reported. Typical delay time per gate was in the range of subnanosecond to 2ns and power dissipation per gate was 0.3- 0.7mW.
Keywords
Boron; Integrated circuit technology; Ion implantation; Oxidation; Power dissipation; Ring oscillators; Semiconductor films; Silicon; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1979.1155911
Filename
1155911
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