DocumentCode
2867026
Title
Carrier based PWM scheme for a three-level diode-clamped five-phase voltage source inverter ensuring capacitor voltage balancing
Author
Karugaba, Sosthenes ; Ojo, Olorunfemi ; Abreham, Meharegzi
Author_Institution
Dept. of Electr. & Comput. Eng., Tennessee Technol. Univ., Cookeville, TN, USA
fYear
2011
fDate
6-11 March 2011
Firstpage
1194
Lastpage
1201
Abstract
A carrier-based modulation scheme for a three-level diode-clamped five-phase voltage source inverter is presented. This technique employs the generation of three average modulation signals for each inverter leg. These signals are compared with the same high frequency triangular carrier signal to produce the composite switching functions for each respective pair of the switching devices. It introduces natural balancing of the capacitor voltage and significantly reduces the harmonic content in both capacitor and output inverter voltages. The technique also ensures zero-neutral-point (NP) potential in the three-level voltage source inverter. Simulation results being compared to the phase disposition (PD) method as well as experimental results on a 10 kVA, three-level diode-clamped five-phase voltage source inverter are included in this paper to validate the presented approach.
Keywords
PWM invertors; semiconductor diodes; apparent power 10 kVA; capacitor voltage balancing; carrier based PWM; composite switching function; three level diode clamped five phase voltage source inverter; zero-neutral-point potential; Capacitors; Equations; Inverters; Leg; Modulation; Semiconductor diodes; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE
Conference_Location
Fort Worth, TX
ISSN
1048-2334
Print_ISBN
978-1-4244-8084-5
Type
conf
DOI
10.1109/APEC.2011.5744745
Filename
5744745
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