• DocumentCode
    2867771
  • Title

    Error diagnosis of sequential circuits using region-based model

  • Author

    D´Souza, A.L. ; Hsiao, Michael S.

  • Author_Institution
    Sun Microsyst., Palo Alto, CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    103
  • Lastpage
    108
  • Abstract
    Algorithms to locate multiple design errors using region-based model are studied for both combinational and sequential circuits. The model takes locality aspect of errors and is based on a 3-value, non-enumerative analysis technique. Studies show the effectiveness of the region based model for gate connection and gate substitution errors. For sequential circuits, we try to locate the time frame at which the error was first excited, by re-simulating as few vectors as possible preceding the erroneous vector in a fully initialized circuit to carry out the diagnosis. Experimental results on benchmark circuits are used to demonstrate rapid and accurate locating of multiple errors
  • Keywords
    combinational circuits; fault diagnosis; fault simulation; logic testing; sequential circuits; 3-value nonenumerative analysis; benchmark circuits; combinational circuits; error diagnosis; gate connection errors; gate substitution errors; locality aspect; multiple design errors; multiple error location; region-based model; sequential circuits; time frame; vector resimulation; Algorithm design and analysis; Circuit faults; Circuit simulation; Combinational circuits; Computer errors; Design engineering; Error correction; Fault diagnosis; Feedback circuits; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2001. Fourteenth International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-0831-6
  • Type

    conf

  • DOI
    10.1109/ICVD.2001.902647
  • Filename
    902647