DocumentCode
2868430
Title
A 80ns 5V-only dynamic RAM
Author
Lee, Jeyull ; Breivogel, J. ; Kunita, R. ; Webb, C.
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
XXII
fYear
1979
fDate
14-16 Feb. 1979
Firstpage
142
Lastpage
143
Abstract
The design and technology of a +5V-only 16K dynamic RAM with a typical access time of 80ns will be described. Power dissipation is 16.5mW standby and 140mW active.
Keywords
Circuit testing; Clocks; Current supplies; DRAM chips; Decoding; Impact ionization; Leakage current; Optical wavelength conversion; Power generation; Production;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1979.1155999
Filename
1155999
Link To Document