Performance optimization of 60 nm channel length vertical MOSFETs using channel engineering

Author

Mahapatra, Santanu ; Ramgopal Rao, V. ; Vasi, Juzer

fYear

2001

fDate

2001

Firstpage

475

Lastpage

478

Abstract

A comprehensive study has been performed to optimize the electrical characteristics of delta doped channel MOSFETs (D2FETs) having channel length of 60 nm. Extensive 2D device simulations have been employed to show that D2FETs exhibit higher drain current drive and reduced short channel and hot carrier effects compared to MOSFETs having uniform channel doping. The improvement has been found significant when the delta peak is shifted near the source end of the channel. Device simulations show acceptable short channel effects for 60 nm D²FETs when the gate oxide thickness is reduced to the 2.5-3 nm regime

Keywords

MOSFET; optimisation; semiconductor device models; 2.5 to 3 nm; 2.5-3 nm regime; 2D device simulation; 60 nm; 60 nm channel length vertical MOSFET; MBE; MOSFET; channel engineering; device simulation; drive currents; gate oxide thickness; hot carrier degradation; optimisation; performance optimization; reduced short channel; Doping profiles; Electric variables; Hot carrier effects; Hot carriers; MOSFETs; Medical simulation; Metallization; Molecular beam epitaxial growth; Optimization; Semiconductor process modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 2001. Fourteenth International Conference on

Conference_Location

Bangalore

ISSN

1063-9667

Print_ISBN

0-7695-0831-6

Type

conf

DOI

10.1109/ICVD.2001.902703

Filename

902703