Frequency-controllable image rejection down CMOS mixer

Author

Phan, Anh-Tuan ; Kim, Chang-Wan ; Kang, Min-Suk ; Lee, Sang-Gug ; Su, Chun-Deok

Author_Institution

RFME Lab., Inf. & Commun. Univ., Daejeon, South Korea

fYear

2004

fDate

18-21 Aug. 2004

Firstpage

308

Lastpage

311

Abstract

This paper presents a low noise frequency controllable image rejection mixer in heterodyne architecture for 2 GHz applications based on 0.18 μm CMOS technology. The designed mixer uses an inductor and capacitors as a notch filter to suppress the image signal and parasitic capacitance to improve the noise figure (NF) and conversion gain. Two small value capacitors in parallel with an inductor are used for precise tuning the desired image frequency. An image rejection of 20-70 dB is obtained in a 200MHz of bandwidth around 2GHz with IF varying from 100 to 300MHz. The simulation results show single-side band (SSB) NF improved 3.7 dB, the voltage conversion gain of 14.7 dB, unproved by more than 4 dB. The circuit operates at the supply voltage of 1.8V, and dissipates 11.34 mW.

Keywords

CMOS integrated circuits; frequency control; integrated circuit design; microwave integrated circuits; microwave mixers; notch filters; 0.18 micron; 1.8 V; 100 to 300 MHz; 11.34 mW; 2 GHz; 200 MHz; CMOS mixer; CMOS technology; capacitors; conversion gain; frequency-controllable image rejection mixer; heterodyne architecture; image frequency; image signal; inductor; noise figure; notch filter; parasitic capacitance; CMOS technology; Capacitors; Filters; Frequency; Image converters; Inductors; Mixers; Noise measurement; Signal design; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave and Millimeter Wave Technology, 2004. ICMMT 4th International Conference on, Proceedings

Print_ISBN

0-7803-8401-6

Type

conf

DOI

10.1109/ICMMT.2004.1411525

Filename

1411525