Design of a Low-Power High-Rate Ultra-Wideband Modulator for 5.8-10.6 GHz

A pulse modulator for ultra-wideband (UWB) transmitters is designed and simulated using 0.13-mum CMOS technology. 8-GHz carrier frequency is modulated into pulses with Gaussian envelope and 1-ns time-width to push the spectrum to 5.8-10.6-GHz band, and to satisfy FCC mask. By using 2-ns pulse-width, it is also possible to utilize the modulator at two sub-bands of 6-8 GHz and 8-10 GHz. The transmitter is low power since it employs a digital structure, and also supports high data rates due to using I/Q modulation. The architecture of modulator consists of Johnson counter, multiplier, current adder, and RF mixer. The key element in the design is ETSPC flip flops that fulfill high-speed and low-power requirements in precision timing. The power-speed trade-off is optimized by decreasing the size of the FFs, and using direct conversion structure for RF mixer. The power consumption of the modulator from 1.2-V power supply is as low as 4.5 mW for the rate of 2 Gchip/s at 8-GHz center frequency.