Low Power Asynchronous Sigma-Delta Modulator Using Hysteresis Level Control

Asynchronous Sigma-Delta Modulator (ASDM) uses Time Encoding Machine (TEM). The method replaces high precision analog amplitude quantizer with 1bit comparator. This reduces the analog circuit complexity. The number of transitions can be controlled by adjusting step size that is hysteresis of the comparator. This in turn reduces the switching activity and the dynamic power consumption. The current work proposes ASDM with control on hysteresis level to control the power consumption. The circuit improves performance of. This work reduces 81% dynamic power consumption over the reported work.