• DocumentCode
    2875082
  • Title

    A 72Kb bipolar DRAM

  • Author

    Houghton, R. ; Boulay, P. ; Penoyer, R.

  • Author_Institution
    IBM Corp., Essex Junction, VT, USA
  • Volume
    XXV
  • fYear
    1982
  • fDate
    10-12 Feb. 1982
  • Firstpage
    70
  • Lastpage
    71
  • Abstract
    A TTL-compatible 72Kb bipolar DRAM chip (8K×9), with data stored on the junction capacitance of a 200μm2dielectric-isolation cell, will be described. The chip operates at 50ns access and 150ns cycle times.
  • Keywords
    Buildings; Dielectric substrates; Fault location; Integrated circuit interconnections; Latches; Physics; Random access memory; Resistors; Solid state circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1982.1156389
  • Filename
    1156389
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2875082