• DocumentCode
    2876647
  • Title

    A fault tolerant MOS-LSI for train controller applications

  • Author

    Masuda, I. ; Ueno, Masahiro ; Tashiro, Keiji ; Yasunami, M.

  • Author_Institution
    Hitachi Research Laboratory, Ibaraki, Japan
  • Volume
    XXVI
  • fYear
    1983
  • fDate
    23-25 Feb. 1983
  • Firstpage
    138
  • Lastpage
    139
  • Abstract
    Fault-tolerant design techniques, which have resulted in the development of a fail-safe LSI circuit for train control applications, will be discussed. The design is based on bit-serial, time-sharing and frequency domain operation, as well as a layout method to restrict possible MOS failure modes.
  • Keywords
    Automatic control; Circuits; Fault tolerance; Fault tolerant systems; Large scale integration; Logic devices; Read only memory; Traffic control; Voltage; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1983 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1983.1156477
  • Filename
    1156477
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2876647