Effects of grain boundaries on TFTs formed by high-temperature MILC

Author

Zhang, Zhikuan ; Wang, Hongmei ; Chan, Mansun ; Jagar, Singh ; Poon, M.C. ; Qin, Ming ; Wang, Yangyuan

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China

fYear

2000

fDate

2000

Firstpage

68

Lastpage

71

Abstract

The effects of grain boundaries on the performance of super TFTs formed by MILC are studied. The existence of grain boundaries in the channel region will cause subthreshold hump, early punchthrough or device degradation, depending on the direction of the grain boundaries. The probability for the channel region of a TFT to cover multiple grains decrease significantly when the device is scaled down, thus resulting in better device performance and higher uniformity. A novel method to measure the grain dimension by using boundaries oxide as a etching mask has also been developed

Keywords

crystallisation; elemental semiconductors; grain boundaries; silicon; thin film transistors; Si; grain boundary; high temperature MILC; metal induced lateral crystallization; oxide etching mask; polysilicon super-TFT; Amorphous silicon; Annealing; Crystallization; Grain boundaries; Grain size; Isolation technology; Microelectronics; Silicon on insulator technology; Temperature; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2000. Proceedings. 2000 IEEE Hong Kong

Conference_Location

Hong Kong

Print_ISBN

0-7803-6304-3

Type

conf

DOI

10.1109/HKEDM.2000.904218

Filename

904218