DocumentCode
2885528
Title
A 25Mb/s CMOS disk data controller
Author
Chan, Alvin ; Deschene, D. ; Yuen, S.
Author_Institution
National Semiconductor Corp., Santa Clara, CA, USA
Volume
XXIX
fYear
1986
fDate
19-21 Feb. 1986
Firstpage
120
Lastpage
121
Abstract
A disk data controller IC which operates at serial data rates of 25Mb/s will be described. The design offers programmable disk formats, error detection and correction and 10Mb/s data transfer between the disk and the host via an on-chip dual-channel DMA controller. The chip is made in a 2μm double metal CMOS process.
Keywords
Clocks; Communication channels; Communication system control; Control systems; Engines; Error correction codes; Hard disks; Microprocessors; Winches; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location
Anaheim, CA, USA
Type
conf
DOI
10.1109/ISSCC.1986.1156988
Filename
1156988
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