Static timing analysis using interval constraints

The authors have reduced the uncertainty inherent in timing analysis due to lack of proper signal interaction modeling and delay evaluation inaccuracy. They have refined the false path elimination algorithms which place upper or lower bounds on the maximum settling time of a network by generalizing the application of logical constraints to time intervals. The proposed method allows simultaneous changes on inputs for path excitation, identifies glitches which cannot propagate, and improves the handling of reconvergent paths. The algorithm presented is based on an evolution of the LSP (longest stability sensitizable path) algorithm and derives multiple test vectors to excite the path as part of the search and elimination process. The timing analyzer is tightly linked to an electrical simulator which is used for verification of candidate paths.<>