DocumentCode
2890527
Title
Matrix control-flow algorithm-based fault tolerance
Author
Ferreira, Ronaldo Rodrigues ; Moreira, Álvaro Freitas ; Carro, Luigi
Author_Institution
Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
fYear
2011
fDate
13-15 July 2011
Firstpage
37
Lastpage
42
Abstract
A novel software-implemented hardware fault tolerance method based on encoding both the control and the data-flow segments of programs with matrices is proposed and evaluated. Results show an average speed-up of 3 times compared to standard duplication and comparison, with coverage higher than 95% for the case studies considered, which outperforms previous works in the field.
Keywords
data flow analysis; fault tolerant computing; matrix algebra; multiprocessing systems; system-on-chip; MPSoC; data flow program segments; encoding; matrix control flow algorithm-based fault tolerance; software-implemented hardware fault tolerance method; Complexity theory; Computer architecture; Encoding; Fault tolerance; Fault tolerant systems; Hardware; Software; MPSoC; embedded systems; energy; error detection and correction; fault tolerance; program construction; soft error;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International
Conference_Location
Athens
Print_ISBN
978-1-4577-1053-7
Type
conf
DOI
10.1109/IOLTS.2011.5993808
Filename
5993808
Link To Document