• DocumentCode
    2897550
  • Title

    Session 25 overview / wireline: CDRs & equalization techniques

  • Author

    Cho, SeongHwan ; Saito, Tatsuya

  • Author_Institution
    KAIST, Daejon, Korea
  • fYear
    2011
  • fDate
    20-24 Feb. 2011
  • Firstpage
    434
  • Lastpage
    435
  • Abstract
    Summary form only given. The explosive demand for high-bandwidth low-power chip-to-chip communication in severe channel conditions calls for innovations in transceiver architectures and circuits. Clock-and-data recovery he next three papers present innovative equalization techniques to address the adverse effects of lossy channels such as inter-symbol interference, crosstalk, and dispersion.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-61284-303-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.2011.5746458
  • Filename
    5746458