A 4-Bits Trimmed CMOS Bandgap Reference with an Improved Matching Modeling Design

Author

Brito, Juan Pablo Martinez ; Bampi, Sergio ; Klimach, Hamilton

Author_Institution

Graduate Program on Microelectron., Fed. Univ. of Rio Grande do Sul, Porto Alegre

fYear

2007

fDate

27-30 May 2007

Firstpage

1911

Lastpage

1914

Abstract

Component tolerances and mismatches due to process variations severely degrade the performance of bandgap reference (BGR) circuits. In this paper, the authors describe the design of a BGR considering the Pelgrom´s mismatch model. The main purpose of our methodology is to convey the design to reach a good trade-off between area and mismatch. Implemented in standard 0.35mum CMOS technology, the circuit also includes a straightforward 4-bits trimming circuit to achieve more process variations independence. Its Monte Carlo temperature coefficient average is 40-ppm/degC and the reference output voltage average is 1.230V. The area of the BGR is 400x350mum² due to our design matching requirements.

Keywords

CMOS integrated circuits; reference circuits; 0.35 micron; 1.230 V; 4 bit; CMOS bandgap references; Monte Carlo temperature coefficient; trimming circuit; CMOS process; CMOS technology; Circuits; Degradation; Microelectronics; Monte Carlo methods; Photonic band gap; Semiconductor device modeling; Temperature; Voltage; CMOS Bandgap References; MOSFET Mismatch Modeling; Process Variations; Trimming Circuit;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Conference_Location

New Orleans, LA

Print_ISBN

1-4244-0920-9

Electronic_ISBN

1-4244-0921-7

Type

conf

DOI

10.1109/ISCAS.2007.378348

Filename

4253037