Accurate determination of CMOS capacitance parameters using multilayer structures

Focuses on the principles and experimental results of accurately measuring very small capacitances on a CMOS integrated circuit. An important feature is that stray capacitance to ground, on either or both nodes of the capacitor, does not alter the measured capacitance value. This allows integration of many relevant design features in small multilayer test structures. The author also presents an implementation of this method in a circuit that accurately extracts the capacitance between stacked layers and fringing capacitance between adjacent signal leads