DocumentCode
2902819
Title
PLASMA: a FSM design kernel
Author
Puri, Ruchir ; Hasan, M.M.
Author_Institution
Indian Inst. of Technol., Kanpur, India
fYear
1990
fDate
17-21 Sep 1990
Abstract
A state machine synthesis system, named PLASMA, which can be used for the implementation of finite-state machines (FSMs) in programmable logic arrays (PLAs) is discussed. The minimization algorithm effectively prunes the tree structure of compatibles list to find the minimum form of a minimized single output change (SOC) machine. State assignment, i.e. the process of binary encoding of internal states of the FSM, has been efficiently utilized to save the silicon area occupied by PLA. The system is complete and works efficiently for incompletely specified sequential machines (ISSMs) to achieve area optimization in the PLA structure
Keywords
logic CAD; logic arrays; minimisation of switching nets; PLA; PLASMA; area optimization; binary encoding; design kernel; finite-state machines; incompletely specified sequential machines; minimization algorithm; minimized single output change; programmable logic arrays; state machine synthesis system; Built-in self-test; Circuit testing; Flip-flops; Kernel; Logic programming; Minimization; Plasmas; Programmable logic arrays; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/ASIC.1990.186202
Filename
186202
Link To Document