DocumentCode
2906347
Title
Low Power ASIP Architecture Optimization based on Target Application Profiling
Author
Kim, Sung Dae ; Sunwoo, Myung H.
Author_Institution
Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon
fYear
2007
fDate
27-30 May 2007
Firstpage
3764
Lastpage
3767
Abstract
This paper describes design of application specific instruction-set processors (ASIP). We implement three ASIPs including signal processor for OFDM communication systems (SPOCS), video specific instruction-set processor (VSIP) and digital audio specific instruction-set processor (DASIP). Our ASIPs have novel instructions and optimized hardware architectures for specific applications. Our ASIPs can have much smaller area and dramatically reduce the numbers of memory accesses compared with commercial DSP chips, which result in low power consumption. All of the proposed ASIPs have been thoroughly verified using the Xilinx XC2v6000 FPGA and one of the implemented ASIPs has been already employed in a digital home theater SoC.
Keywords
OFDM modulation; application specific integrated circuits; instruction sets; low-power electronics; microprocessor chips; optimisation; DSP chips; OFDM communication systems; Xilinx XC2v6000 FPGA; application specific instruction-set processors; digital audio specific instruction-set processor; digital home theater SoC; hardware architectures; low power ASIP architecture optimization; low power consumption; signal processor; target application profiling; video specific instruction-set processor; Application software; Application specific integrated circuits; Application specific processors; Computer architecture; Design optimization; Digital signal processing; Digital signal processing chips; Hardware; OFDM; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
Conference_Location
New Orleans, LA
Print_ISBN
1-4244-0920-9
Electronic_ISBN
1-4244-0921-7
Type
conf
DOI
10.1109/ISCAS.2007.378780
Filename
4253500
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