Non-TMR SEU-hardening techniques for SiGe HBT shift registers and clock buffers

Author

Wilcox, Edward P. ; Phillips, Stanley D. ; Cressler, John D. ; Marshall, Paul W. ; Carts, Martin A. ; Pellish, Jonathan A. ; Richmond, Larry ; Mathes, William ; Randall, Barbara ; Post, Devon ; Gilbert, Barry ; Daniel, Erik

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2009

fDate

14-18 Sept. 2009

Firstpage

504

Lastpage

507

Abstract

We report new results from both broad-beam, heavy-ion and proton experiments for circuit-level RHBD techniques in SiGe digital logic. Redundant circuit elements within the latches are used to significantly reduce single-event upset rates in shift registers and clock paths, without resorting to TMR techniques.

Keywords

Ge-Si alloys; clocks; heterojunction bipolar transistors; radiation hardening (electronics); semiconductor materials; shift registers; SiGe; SiGe HBT shift registers; SiGe digital logic; circuit-level RHBD techniques; clock buffers; clock paths; non-TMR SEU-hardening techniques; redundant circuit elements; single-event upset; bit error rate testing; gated feedback cell (GFC); radiation hardening by design (RHBD); silicon-germanium (SiGe); single event upset (SEU);

fLanguage

English

Publisher

ieee

Conference_Titel

Radiation and Its Effects on Components and Systems (RADECS), 2009 European Conference on

Conference_Location

Bruges

ISSN

0379-6566

Print_ISBN

978-1-4577-0492-5

Electronic_ISBN

0379-6566

Type

conf

DOI

10.1109/RADECS.2009.5994703

Filename

5994703