Low voltage wide range DLL-based quad-phase core clock generator for high speed network SRAM application

This paper proposed DLL-based quad phase core clock generator, whose operation voltage is sub 1V. The quad phase clocks are used to transmit DDR data and complementary echo clocks. The proposed DLL generates evenly spaced quad phase clocks without additional delay elements and duty cycle corrector, so it has no systematic error from duty cycle correction. To reduce the amount of bang-bang jitter, a new interpolation scheme is proposed. The phase shift error of interpolator is less than 2% of ideal one phase step and doesn´t have 3-code dither at lock at digitally controlled DLL. The proposed circuits were fabricated with 0.1 μm CMOS process.