A Cyclic A/D Conversion Technique with Improved SFDR

This work proposes a random feedback-capacitor interchanging (RFCI) technique for cyclic analog-to-digital converters (ADCs) to reduce their harmonic distortion caused by capacitor mismatch without trimming and/or calibration. The proposed RFCI technique can be realized with the simple rearrangement of feedback capacitors of ADCs in different operation cycles. Hence, complicated circuits and extra calibration cycles are not needed. The RFCI technique improves upon the spurious-free dynamic range (SFDR) of conventional ADCs without sacrificing signal-to-noise-and-distortion ratio (SNDR) at Nyquist rate. Hence, the capacitor matching requirement is relaxed for high SFDR specification and the capacitor sizes can then be scaled down to fit SNDR specification, reducing the driving capability required for ADCs, thereby reducing the total power and area. An 1-bit/stage-with-extended-range architecture incorporating digital correction is adopted for analysis and in design examples. At 3-sigma level, 0.2% capacitor mismatch combined with 1.56%-of-full-scale comparator offset are adopted in Monte Carlo simulations. The simulation results show that the RFCI technique has 18 dB and 5 dB higher SFDR and SNDR respectively, than the conventional technique for a 14-bit cyclic ADC.