DocumentCode
2912591
Title
A new approach for system integrated packaging
Author
Aschenbrenner, R. ; Ostmann, A. ; Jung, E. ; Landesberger, Ch ; Reichl, H.
Author_Institution
Fraunhofer-Inst. fur Zuverlassigkeit und Mikrointegration, Berlin, Germany
fYear
2000
fDate
2000
Firstpage
41
Lastpage
45
Abstract
As the number of applications for flexible assemblies is growing there is also a larger variation of requirements for such packages. Therefore, different technologies from CSPs to smart cards have been developed. This paper describes the results of the development of a new approach to wafer-level redistribution as well as packaging concepts for CSPs and embedding of ultra-thin ICs into laminated substrates. The electrical interconnection is made by fully-additive deposition of Cu lines. The technology is based on wet-chemical treatments which enable the avoidance of expensive vacuum processes and electroplating. A photo-sensitive epoxy material, commonly used in printed circuit board manufacturing, was chosen as dielectric. Furthermore, the process implements electroless Ni deposition to protect the Al bond pads and to act as a solder diffusion barrier on the Cu lines. The technologies are presented together with the important parameters and typical results achieved. In order to evaluate the applicability of the processes developed, the reliability data of the obtained assemblies is presented and compared
Keywords
assembling; chip scale packaging; diffusion barriers; electroless deposition; integrated circuit bonding; integrated circuit interconnections; integrated circuit reliability; protective coatings; smart cards; soldering; surface treatment; Al; Al bond pad protection; CSPs; Cu; Cu lines; Ni-Al; Ni-Cu; additive deposition; assembly reliability; electrical interconnection; electroless Ni deposition; embedded ultra-thin ICs; flexible assemblies; laminated substrates; packages; packaging; photo-sensitive epoxy dielectric material; printed circuit board manufacturing; smart cards; solder diffusion barrier; system integrated packaging; wafer-level redistribution; wet-chemical treatments; Assembly; Dielectric materials; Dielectric substrates; Integrated circuit interconnections; Manufacturing; Packaging; Printed circuits; Smart cards; Vacuum technology; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2000. (EPTC 2000). Proceedings of 3rd
Print_ISBN
0-7803-6644-1
Type
conf
DOI
10.1109/EPTC.2000.906347
Filename
906347
Link To Document