DocumentCode
2915513
Title
EPLDs - a Milestone in the World of Logic Design
Author
Uma, H.L.
Author_Institution
Sritech Information Technology (P) Ltd.
fYear
1992
fDate
4-7 Jan 1992
Firstpage
330
Lastpage
331
Keywords
CMOS technology; EPROM; Industrial training; Logic arrays; Logic design; Logic devices; Macrocell networks; Programmable logic arrays; Semiconductor device reliability; Semiconductor devices;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1992. Proceedings., The Fifth International Conference on
ISSN
1063-9667
Print_ISBN
0-8186-2465-5
Type
conf
DOI
10.1109/ICVD.1992.658075
Filename
658075
Link To Document