DocumentCode
2919954
Title
Performance enhancement of single electron junction 1-bit full adder
Author
Basith, Iftekhar Ibne ; Supon, Tareq Muhammad ; Muhury, Ajit ; Rashidzadeh, Rashid ; Ahmadi, Majid
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON, Canada
fYear
2011
fDate
11-14 Dec. 2011
Firstpage
157
Lastpage
160
Abstract
The focus of this paper is to study the reliability issue of single-electron tunneling (SET) technology using multi-island structure for 1-bit full adder circuit. A new set of parameters are proposed in this paper showing better sensitivity towards the random background charge (RBC). Impact of temperature and background charge on the performance parameters and voltage swing are also analyzed. Multi-island clique (K-3) structure is implemented and compared with the designs reported in the literature.
Keywords
adders; circuit reliability; single electron devices; K-3 structure; RBC; SET technology; multiisland clique structure; random background charge; single electron junction full adder circuit; single-electron tunneling technology; voltage swing; word length 1 bit; Adders; Integrated circuit reliability; Junctions; Logic gates; Periodic structures; Simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on
Conference_Location
Beirut
Print_ISBN
978-1-4577-1845-8
Electronic_ISBN
978-1-4577-1844-1
Type
conf
DOI
10.1109/ICECS.2011.6122238
Filename
6122238
Link To Document