Low energy level converter design for sub-Vth logics

A low energy consumption level converter (LC) is presented for logic voltage conversion from sub-V_th voltage to nominal high voltage. By employing the multi-stage architecture and implementing a unique circuit inside each stage, the proposed LC can reduce its energy consumption by almost 3 orders and at the same time ensure the robustness of its function. The LC was fabricated and measured to verify its operation and the performance improvement.