DocumentCode
2927044
Title
Diagnosing integrator leakage of single-bit first-order ΔΣ modulator using DC input
Author
Xuan-Lun Huang ; Yang, Chen-Yuan ; Huang, Jiun-Lang
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
fYear
2009
fDate
19-22 Jan. 2009
Firstpage
775
Lastpage
780
Abstract
Integrator leakage is a dominant factor in the SNR (signal-to-noise ratio) loss of DeltaSigma modulators. In this paper, we propose a design-for-test (DfT) technique to diagnose the integrator leakage of the single-bit first-order DeltaSigma modulator. The proposed technique is a low-cost solution; it only adds two multiplexers to the modulator, utilizes a single DC voltage as the test stimulus, and estimates the integrator leakage by analyzing the digitized bit stream. Furthermore, the technique can be easily extended to higher order DeltaSigma modulators. Simulation results show that accurate estimations of the integrator leakage can be achieved even at the presence of noise.
Keywords
circuit noise; circuit testing; delta-sigma modulation; design for testability; integrating circuits; multiplexing equipment; SNR loss; design-for-test technique; digitized bit stream analysis; integrator leakage diagnosis; multiplexers; signal-to-noise ratio; single-bit first-order DeltaSigma modulator; Analog-digital conversion; Built-in self-test; Circuit testing; Design for testability; Digital modulation; Digital signal processing; Multiplexing; Signal to noise ratio; System-on-a-chip; Voltage; ΔΣ modulation; analog/mixed-signal testing; design-for-test (DfT); diagnosis; integrator leakage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
978-1-4244-2748-2
Type
conf
DOI
10.1109/ASPDAC.2009.4796574
Filename
4796574
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