Concurrent switch-level timing simulation based on waveform relaxation

This paper describes the implementation of a switch-level model in a waveform-relaxation-based concurrent circuit simulator. The model requires much less time for model evaluation compared to continuous models, while still giving sufficient accuracy. Multicomputer runs have shown speedups in the range from 5 to 10, corresponding to efficiencies between 15 and 30%; more than 100 computing nodes have been efficiently used, with less than 4 circuit nodes per computing node