DocumentCode
2929365
Title
Optoelectronic backplane for parallel computing
Author
Wijetunga, P. ; Sondeen, J. ; Levi, A.F.J.
Author_Institution
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
2000
fDate
7-12 May 2000
Firstpage
534
Lastpage
535
Abstract
Summary form only given. Optical interconnects can support a larger number of I/O and can achieve higher bandwidths for less power than electrical interconnects. Fixed receiver path (FRP) networks, where each processor in the network has a unique receive path, reduce the complexity of on-chip data-path and control logic, as well as exploit the I/O count and bandwidth advantages of optoelectronics to increase the network bandwidth and to reduce node latencies. We show the backplane components of a 64-processor FRP-network having four processors per processor board and 16 switch ICs providing the optical-to-electrical interface and network switching. With eight-bit wide datapaths, this network requires 512 (64/spl times/8) optical lines.
Keywords
computer networks; optical interconnections; optical logic; parallel architectures; 64-processor FRP-network; I/O count; arallel computing; control logic; eight-bit wide datapaths; fixed receiver path networks; network switching; node latencies; on-chip data-path; optical interconnects; optical lines; optical-to-electrical interface; optoelectronic backplane; unique receive path; Backplanes; Bandwidth; Delay; Fiber reinforced plastics; Logic; Network-on-a-chip; Optical fiber networks; Optical interconnections; Optical receivers; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Lasers and Electro-Optics, 2000. (CLEO 2000). Conference on
Conference_Location
San Francisco, CA, USA
Print_ISBN
1-55752-634-6
Type
conf
DOI
10.1109/CLEO.2000.907354
Filename
907354
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