A two-dimensional, distributed logic processor for machine vision

A very-fine-grained architecture which can solve certain two-dimensional machine vision problems very efficiently is discussed. The architecture maintains both a high degree of flexibility and fine-grainness. This is done by reducing each processor to an associative memory cell. However, unlike classical associative memory processors, the present processor uses a two-dimensional nearest-neighbor interconnect. Arithmetic operations are based on the use of a redundant number system and a physically compact memory word structure. These features provide a high level performance