DocumentCode
2935280
Title
Intelligent bees for QoS routing in Networks-on-Chip
Author
Xie, Peibo ; Gu, Huaxi
Author_Institution
State Key Lab. of Integrated Service Networks, Xidian Univ., Xi´´an, China
Volume
1
fYear
2010
fDate
1-2 Aug. 2010
Firstpage
311
Lastpage
314
Abstract
Networks-on-Chip (NoCs) for future many-core processor platforms integrate more and more heterogeneous components of different types and many real-time and latency-sensitive applications can run on a single chip concurrently. The reconfigurable FPGA and reconfigurable NoCs have emerged for the purpose of reusability. Those types´ traffics within NoCs exhibit diverse, burst, and unpredictable communication patterns. QoS guaranteed mechanisms are necessary to provide guaranteed throughput (GT) or guaranteed bandwidth (GB) performance for NoCs. In this paper, we propose a QoS routing algorithm inspired by bees´ foraging behaviors to provide guaranteed bandwidth performance. Virtual circuits and Spatial Division Multiplexing are employed to maintain available paths for different type´s traffics.
Keywords
field programmable gate arrays; microprocessor chips; network-on-chip; quality of service; space division multiplexing; NoC; QoS routing; guaranteed bandwidth performance; guaranteed throughput performance; heterogeneous components; intelligent bees; latency-sensitive applications; many-core processor platforms; networks-on-chip; real-time applications; reconfigurable FPGA; spatial division multiplexing; virtual circuits; Algorithm design and analysis; Switches; NoCs; QoS Routing; SDM; Virtual Circuit;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-7969-6
Type
conf
DOI
10.1109/PACCS.2010.5626974
Filename
5626974
Link To Document