DocumentCode
2936417
Title
High-speed Vlsi pipelined Processor Design For Lossless Image Data Compression
Author
Fang, Wai-Chi ; Sheu, Bing J.
Author_Institution
California Institute of Technology
fYear
1992
fDate
28-30 Oct 1992
Firstpage
215
Lastpage
224
Keywords
Algorithm design and analysis; Data compression; Entropy; Image coding; Image storage; Laboratories; Process design; Propulsion; Signal design; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, V, 1992., [Workshop on]
Print_ISBN
0-7803-0811-5
Type
conf
DOI
10.1109/VLSISP.1992.641054
Filename
641054
Link To Document