DocumentCode
29374
Title
Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process Characterization
Author
Tseng-Chin Luo ; Chao, Mango C-T ; Huan-Chi Tseng ; Goto, Masaharu ; Fisher, Philip A. ; Yuan-Yao Chang ; Chi-Min Chang ; Takao, Takayuki ; Iwasaki, Katsuhito ; Cheng Mao Lee
Author_Institution
Taiwan Semicond. Manuf. Corp., Hsinchu, Taiwan
Volume
22
Issue
5
fYear
2014
fDate
May-14
Firstpage
1138
Lastpage
1149
Abstract
As process technologies continually advance, process variation has greatly increased and has gradually become one of the most critical factors for IC manufacturing. Furthermore, these increasingly complex processes continue to make greater use of stressors for mobility enhancement, thus requiring large volumes of data for extensive characterization of layout-dependent effects (LDE) for validation of both SPICE models and design for manufacturing. Transistor threshold voltage (Vt) is a commonly used parameter both for characterization during process development and for monitoring of volume manufacturing. To adequately quantify local process variation or LDE, Vt must be measured for a sufficiently large number of device-under-tests (DUTs) to obtain a statistically representative sample population. The number of Vt measurements required to obtain such a statistically significant result, however, requires extremely long testing time, especially for array-based test structure designs including thousands of DUTs. In this paper, we present a very fast threshold voltage measurement methodology using an operational amplifier-based source-measure unit test configuration, which greatly improves testing efficiency and accuracy, and is not sensitive to process variation. The proposed test methodology can improve Vt testing time by a factor of 5-10 relative to the commonly used binary-search algorithm, and by a factor of ~2 relative to an optimized interpolation algorithm, and achieves better accuracy (standard deviation of Vt = 0.15 mV, versus typical accuracy of ~ 0.5 mV for the two algorithms mentioned). Furthermore, the layout and configuration of conventional test structures need not be modified to adapt the proposed methodology. The measured results from the most advanced process technology nodes demonstrate the testing efficiency and accuracy of the proposed test structure in characterizing the large number of DUTs re- uired for quantifying process variation or LDEs.
Keywords
MOSFET; interpolation; operational amplifiers; search problems; semiconductor device measurement; semiconductor device testing; voltage measurement; DUTs; FETs; IC manufacturing; LDE characterization; SPICE models; advanced process technology nodes; array-based test structure designs; binary-search algorithm; design for manufacturing; device-under-tests; fast transistor threshold voltage measurement method; high-speed high-accuracy advanced process characterization; layout-dependent effects; local process variation; mobility enhancement; operational amplifier-based source-measure unit test configuration; optimized interpolation algorithm; test structures; volume manufacturing monitoring; Accuracy; Current measurement; Interpolation; Logic gates; Semiconductor device measurement; Transistors; Voltage measurement; Design for manufacturing (DFM); Threshold voltage; Variation;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2013.2265299
Filename
6555943
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